1. Field of the Invention
The present invention provides a circuit for a dual-winding motor apparatus. In particular, the invention provides a switching regulation circuit that may prevent malfunction during operation.
2. Descriptions of the Related Art
Various electronic products generate large amounts of heat due to the thermal effect of the electric current during the operation of internal circuits. Accordingly, a fan motor is needed to dissipate heat during the operation of the circuits. One apparatus commonly used to control the fan motor is the dual-winding motor apparatus. FIG. 1 depicts a schematic view of a dual-winding motor apparatus 1, which operates under the following principle. A current is fed to the winding of a dual-winding assembly 13 wound on a stator 11 of the dual-winding motor apparatus 1. The magnetomotive force generated between the winding and a rotor drives the fan 15 to rotate. Here, the dual-winding assembly 13 on the same stator 11 is wound in such a manner that one winding 13a is spirally wound in a clockwise direction from top to bottom, while the other winding 13b is spirally wound in a counterclockwise direction from top to bottom, as depicted in FIG. 2.
In reference to FIG. 3, a circuit used for rotating the fan 15 of the dual-winding motor apparatus 1 is depicted therein. Upon detecting the rotational position of a rotor, the rotation detector 35 sends a signal 35a to a driving circuit 33a, which then outputs a detection signal 34a to the gate 311a of a gate-controlled device 31a. Alternatively, the rotation detector 35 sends a signal 35b to the driving circuit 33b, which then outputs a detection signal 34b to the gate 311b of a gate-controlled device 31b. Generally, each of the gate-controlled devices is an N-type metal-oxide-semiconductor field effect transistor (N-type MOSFET), which will be used as an example in the following description. To facilitate the descriptions of the related art, an example where one winding 13b of the dual-winding assembly experiences a variation in the flux of the other winding 13a will be described herein. When a negative voltage is induced across the winding 13b, the induced current flows from the drain 313b of the gate-controlled device to the winding 13b. When the negative voltage is greater than the threshold voltage of a parasitic diode 317b, the parasitic diode 317b is subjected to a forward bias and thus, is turned on. Consequently, the charge carriers flow into a P-type substrate of the gate-controlled device 31b, causing an adverse effect on the normal operation of the circuit, and leading to the malfunction of the circuit of the gate-controlled device 31b. Furthermore, this may lead to a CMOS latch-up effect, causing permanent damage to the driving circuit. Likewise, when the winding 13a experiences a variation of flux of the winding 13b, the same problem arises as well, and will not be further described herein.
FIG. 4 illustrates a schematic cross-sectional view of the gate-controlled device 31a or 31b. Because the gate-controlled devices 31a, 31b are the same in structure, only the gate-controlled device 31b will be described as an example hereinbelow. When the gate 311b of the gate-controlled device 31b is turned off, the current is not allowed to flow between the drain 313b and the source 315b. In the substrate 60 of the gate-controlled device 31b, there is a parasitic diode 317b which is electrically connected to the drain 313b at one end and electrically connected to the source 315b at the other end. However, when a negative voltage is induced at the drain 313b by the mutual induction effect of the winding 13b and causes a forward bias exceeding the threshold voltage of the parasitic diode 317b, the parasitic diode 317b will be turned on. If the current flowing through the parasitic diode 317b carries an excessive amount of charge carriers or an excessively high energy, excessive electrons will be found in the substrate 60, which may cause malfunction during the operation of the circuit and thus impair performance of the whole circuit.
To overcome the aforesaid shortcoming, a solution has been proposed and widely adopted in the semiconductor industry. According to this solution, a guard ring is designed in the P-type substrate of the N-type MOSFET 31 to capture or collect the charge carriers injected into the P-type substrate to avoid the latch-up effect and consequent malfunction of the circuit. Unfortunately, when the energy or amount of charge carriers injected into the P-type substrate is excessively high, the guard ring is unable to completely capture or collect the charge carriers, thus leading to the latch-up effect.
In view of this, it is highly desirable in the art to avoid degradation in the performance of the circuit due to unexpected charge migration caused by a turned-on parasitic element.